2022-03-19 / Last updated : 2022-12-10 admin Simulator Benchmarks on RISC-V Out-of-Order Simulator We have created a simulator for NaxRiscv, a RISC-V Out-of-Order core, and ran the benchmarks CoreMark and Dhrystone.
2022-03-05 / Last updated : 2022-08-21 admin FPGA Building an ML Processor using CFU Playground (Part 1) We have built a machine learning (ML) processor that leverages RISC-V custom instructions to accelerate Person Detection int8 model inference 5.6 times.
2022-02-19 / Last updated : 2022-12-09 admin FPGA Benchmarks in LiteX/Rocket on FPGA boards We measured a performance of the multi-core 64-bit Rocket Chip SoCs introduced in the previous article using the benchmark CoreMark.
2022-02-05 / Last updated : 2022-12-09 admin FPGA Booting RISC-V Debian in LiteX/Rocket on FPGA boards We have succeeded in configuring SoCs with 64-bit RISC-V Rocket Chip using LiteX, and booting RISC-V Debian on two FPGA boards, a Qmtech Wukong board and a Digilent Nexys Video.
2022-01-22 / Last updated : 2022-10-08 admin FPGA Testing LiteX/VexRiscv on Sipeed Tang Primer With the addition of initial support for Sipeed Tang Primer and Anlogic FPGA to LiteX, an SoC builder, we tried to create SoCs.
2022-01-08 / Last updated : 2022-12-09 admin FPGA Building an Octa-core 32-bit RISC-V PC on an FPGA board We built an octa-core 32-bit RISC-V PC running the X Window System (X11) on the Qmtech Wukong board. The USB-connected keyboard and mouse use the Wireless Combo MK245 NANO from Logitech.
2021-12-18 / Last updated : 2021-12-17 admin Maix Bit Acoustic Beamforming using a Sipeed R6+1 Microphone Array The Sipeed R6+1 microphone array can be used for sound source localization and beamforming by combining with Sipeed Maix Dock/Go/Bit. We calculated the pattern of this microphone array.
2021-12-04 / Last updated : 2022-12-09 admin FPGA Running RISC-V Debian on FPGA boards using Vivado We have succeeded in configuring SoCs with 64-bit RISC-V Rocket Chip using Vivado, and running RISC-V Debian on two FPGA boards, the Qmtech Wukong board and the Digilent Nexys Video.
2021-11-20 / Last updated : 2021-12-18 admin FPGA Benchmarks in LiteX/VexRiscv on an Arty A7-35T We ran the Whetstone and Dhrystone benchmarks for the gateware and software combination of Linux on LiteX-VexRiscv.
2021-11-06 / Last updated : 2022-12-09 admin FPGA Building a RISC-V computer on an Arty A7-35T FPGA board with SaxonSoc We built a RISC-V computer running the X Window System (X11) and using the SaxonSoc on an Arty A7-35T FPGA board from Digilent.
